Field
The present disclosure relates generally to scan chains, and more particularly, to an asynchronous reset scheme for scan chains with asynchronous reset signals.
Background
To support a universal asynchronous reset (UAR) methodology, set/reset flip-flops are used in scan chains within a memory in a system on chip (SoC). In some implementations, set/reset flip-flops are 10% larger than non-set/non-reset flip-flops. The larger flip-flops affect the area, power consumption, and speed of operation of the SoC. Accordingly, apparatuses and methods are needed for using non-set/non-reset flip-flops in scan chains in association with asynchronous resets of the scan chains.